Publications

Notable Publications

(Full list is attached after the selected publication list)

  • MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Dataflows
    Hyoukjun Kwon, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
    IEEE MICRO – Top Picks in Computer Architecture Conferences in 2019 (Top Picks)
    2020
    [Paper]
  • Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach
    Hyoukjun Kwon, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
    In Proc. of the IEEE/ACM International Symposium on Microarchitecture (MICRO)
    Selected as IEEE MICRO Top Picks in Computer Architecture Conferences in 2019
    Final list at student research competition (SRC) at MICRO 2018
    Oct. 2019
    [Paper][Slides][Project Home Page]
  • MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
    Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
    In Proc. of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
    Honorable Mention : IEEE MICRO Top Picks in Computer Architecture Conferences in 2018
    Mar. 2018
    Acceptance Rate: 17.5% (56/319)
    [Paper]
  • [Book] Data Orchestration in Deep Learning Accelerators
    Tushar Krishna, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, and Ananda Samajdar
    Synthesis Lectures on Computer Architecture, Morgan & Clay, 2020
    [Book]

Full Publication List

  • C: Conference paper
  • J: Journal paper
  • W: Workshop paper
  • D: Domestic conference paper (Korea)

2021

[C14]  Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package
Robert Guirado and Hyoukjun Kwon (equal contribution), Sergi Abadal, Eduard Alarcon, and Tushar Krishna
In Proc. of the 26th Asia and South Pacific Design Automation Conference (ASP-DAC)
Jan. 2021 (to appear)
Acceptance Rate: 34.2% (111/327)

2020

[J3] Architecture, Chip, and Package Co-design Flow for 2.5D Integration of Reusable IP Chiplets
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, and Sung Kyu Lim
IEEE Transactions on Very Large Scale Integration (VLSI) Systems (VLSI)
2020
[Paper]

[B1] Data Orchestration in Deep Learning Accelerators
Tushar Krishna, Hyoukjun Kwon, Angshuman Parashar, Michael Pellauer, and Ananda Samajdar
Synthesis Lectures on Computer Architecture, Morgan & Clay, 2020
[Book]

[C13] Co-Exploration of Neural Architectures and Heterogeneous ASIC Accelerator Designs Targeting Multiple Tasks
Lei Yang, Zheyu Yan, Meng Li, Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, Vikas Chandra, Weiwen Jiang, Yiyu Shi
In Proc. of the 57th Annual Design Automation Conference (DAC)
Jul. 2020
[Paper]

[J2] MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Dataflows
Hyoukjun Kwon
, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
IEEE MICRO – Top Picks in Computer Architecture Conferences in 2019 (Top Picks)
2020
[Paper]

[C12] SIGMA: A Sparse and Irregular GEMM Accelerator with Flexible Interconnects for DNN Training
Eric Qin, Ananda Samajdar, Hyoukjun Kwon, Vineet Nadella, Sudarshan Srinivasan, Dipankar Das, Bharat Kaul, and Tushar Krishna
In Proc. of The 26th IEEE International Symposium on High-Performance Computer Architecture (HPCA)
Received the best paper award at the conference

Feb. 2020
[Paper]

2019

[C11] Understanding the Impact of On-Chip Communication on DNN Accelerator Performance
Robert Guirado, Hyoukjun Kwon, Sergi Abadal, Eduard Alarcon, and Tushar Krishna
In Proc. of the 26th IEEE International Conference on Electronics Circuits and System (ICECS)
Nov. 2019

[C10] Understanding Reuse, Performance, and Hardware Cost of DNN
Dataflows: A Data-Centric Approach
Hyoukjun Kwon
, Prasanth Chatarasi, Michael Pellauer, Angshuman Parashar, Vivek Sarkar, and Tushar Krishna
In Proc. of the IEEE/ACM International Symposium on Microarchitecture (MICRO)
Selected as IEEE MICRO Top Picks in Computer Architecture Conferences in 2019
Final list at student research competition (SRC) at MICRO 2018

Oct. 2019
[Paper][Slides][Project Home Page]
Acceptance Rate: 23.0% (79/344)

[C9] Architecture, Chip, and Package Co-design Flow for 2.5D Integration of Reusable IP Chiplets
Jinwoo Kim, Gauthaman Murali, Heechun Park, Eric Qin, Hyoukjun Kwon, Venkata Chaitanya Krishna, Nihar Dasari, Arvind Singh, Minah Lee, Hakki Torun, Kallol Roy, Madhavan Swaminathan, Saibal Mukhopadhyay, Tushar Krishna, and Sung Kyu Lim
In Proc. of the 56th Annual Design Automation Conference (DAC)
Jun. 2019
[Paper]

[C8] mRNA: Enabling Efficient Mapping Space Exploration on a Reconfigurable Neural Accelerator
Zhongyuan Zhao, Hyoukjun Kwon, Sachit Kuhar, Weiguang Sheng , Zhigang Mao, and Tushar Krishna
In Proc. of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
Mar. 2019
[Paper]
Acceptance Rate: 29.5% (26/88)

2018

[J1] A Communication-driven Approach for Designing Flexible DNN Accelerators
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
IEEE Micro Special Issue on Hardware Acceleration (IEEE Micro)
Nov./Dec. 2018
[Paper]

[C6] MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Proc. of the 23rd ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
Honorable Mention in IEEE MICRO Top Picks 2019

Mar. 2018
Acceptance Rate: 17.5% (56/319)
[Paper]

[C5] MAERI: Enabling Flexible Dataflow Mapping over DNN Accelerators via Reconfigurable Interconnects
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Inaugural SysML Conference (SysML) (not-archived)
Feb. 2018
[Paper]


[W1] Spoofing Prevention via RF Power Profiling in Wireless Network-on-Chip
Brian Lebiednik, Sergi Abadal, Hyoukjun Kwon, and Tushar Krishna
In Proc. of the 3rd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS)
Jan. 2018
[Paper]

2017

[C4] Rethinking NoCs for Spatial Neural Network Accelerators
Hyoukjun Kwon, Ananda Samajdar, and Tushar Krishna
In Proc. of the ACM International Symposium on Network-on-Chip (NOCS)
Oct. 2017
[Paper][Code]

[C3] Adaptive Manycore Architectures for Big Data Computing
Janardhan Rao Doppa, Ryan Gary Kim, Mihailo Isakov, Michel A. Kinsy, Hyoukjun Kwon, and Tushar Krishna
In Proc. of the ACM International Symposium on Network-on-Chip (NOCS), (special session paper)
Oct. 2017
[Paper]


[C2] Proving Flow Security of Sequential Logic via Automatically-Synthesized Relational Invariants
Hyoukjun Kwon, William Harris, and Hadi Esmaeilzadeh
In Proc. of the IEEE Computer Security Foundations Symposium (CSF)
Aug. 2017
Acceptance Rate: 34% (32/94)
[Paper]

[C1] OpenSMART: Single-Cycle Multi-hop NoC Generator in BSV and Chisel
Hyoukjun Kwon and Tushar Krishna
In Proc. of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
Apr. 2017
Acceptance Rate: 29% (24/81)
[Paper]

2015

[D2] Improving the Lifetime of NAND Flash-based Storages by Minhash Assisted Delta-compression Engine(MADE)
Hyoukjun Kwon, Dohyun Kim, Jisung Park, and Jihong Kim
Journal of KIISE, 2015
[Paper]

2014

[D1] Improving the Lifetime of NAND Flash-based Storages by Minhash Assisted Delta-compression Engine(MADE)
Hyoukjun Kwon, Dohyun Kim, Jisung Park, and Jihong Kim
Proceedings of KIISE Conference, 2014
[Paper]

Preprint

HERALD: Optimizing Heterogeneous DNN Accelerators for Edge Devices
Hyoukjun Kwon, Liangzhen Lai, Tushar Krishna, and Vikas Chandra
Arxiv Preprint, 2019
[Paper]

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