Research

Research Vision

Keywords: Ubiquitous Intelligence, On-device AI, Energy efficiency, Privacy, Co-design

I envision ubiquitous intelligence enabled by AI and edge computing technologies, which will empower people to expand their capability and enable them to focus on important aspects (societal values, creative works, and so on) rather than tedious and repetitive tasks. To enable seamless intelligence, we need to address the following three key research questions:

1. [AI Algorithms] How to extend the intelligence capabilities of computers (i.e., How to do more kinds of jobs)
2. [Intelligence Systems / Devices] How to enable real-time intelligence with low energy cost (i.e., How to do it faster and efficiently)
3. [Privacy] How to protect user data while using intelligence systems (i.e., How to do it securely)

These questions are not independent; we can align AI algorithms with security schemes (e.g., utilize an approximate non-linear function to enable direct computation on encrypted data), we can specialize hardware for a specific set of algorithms, and so on. 

Accordingly, my approach to these problems is co-design across the compute stack. In particular, my interests are in co-design across algorithms, system software, compiler, programming language, and hardware architecture. 

Research Interest (categorized into traditional areas of CS)

My main background is in computer architecture. My current research interest is mainly in accelerating deep learning and other heavy applications using co-design approaches. My research interests cover (but not limited to!) the topics I list below:

• Computer Architecture
  • Accelerators for deep learning, graph, and so on
  • Interconnection networks (NoCs)
  • Reconfigurable architecture (CGRA)
  • Design automation
  • Hardware security
• Compiler
  • Dataflow/mapping (loop optimizations) analysis and optimization for accelerators
  • Data-centric dataflow/mapping representation
  • Dataflow – HW co-design
• Machine learning
  • Efficient Model Architectures
  • Model – Dataflow – Accelerator co-design