MAERI: A deep neural network accelerator enabling flexible dataflow via reconfigurable interconnects Category: Hardware Language: Bluespec System Verilog [Project Page][Source Code]
MAESTRO: A cost and benefit model of dataflows in deep neural networkaccelerators Category: Software Language: C++ [Project Page]
[Teaching] Designing CNN Accelerators using Bluespec System Verilog – Lab Code Lab code used for a three-day course for undergraduate students at Seoul National University (SNU) in December 2017. Category: Hardware Language: Bluespec System Verilog [Slides_Day1][Slides_Day2][Slides_Day3][Github repository]
Microswitch-NoC: A light-weight NoC for accelerators Category: Hardware Language: Bluespec System Verilog [Project Page][Source Code]
